Industry utilizes or has proposed kinds of techniques for the manufacture of a MOS integrated circuit device. As the channel length (L.sub.gate) becomes shorter and shorter, short channel effects tend to occur. Thus, how to suppress the short channel effects is very important in today's technology.
Punchthrough is one serious problem of the short channel effects. It makes the gate lose the ability to control the current. Therefore, when the device is scaled down, the punchthrough voltage (V.sub.PT) is to be increased. Although to increase the substrate doping concentration is helpful in increasing the punchthrough voltage, at the same time the surface vertical field will also be increased so that the mobility will be lowered and the junction capacitance at the source and the drain regions will be increased. That is, the above method is not so satisfactory. One improvement of the above method is to keep the surface channel region at a relatively low concentration and the region between the source and the drain at a relatively higher concentration.
Some methods are also proposed to solve the above-mentioned problem:
(1) Atomic-Layer Doped (ALD) structure: this structure is formed by the epitaxy materials. PA1 (2) Punchthrough stopper: this structure is executed by the implantation between the source and the drain to form a high concentration region therebetween. PA1 (3) By the Self-aligned Pocket Implantation (SPI) technology to form a region under the lightly-doped drain (LDD) regions and at a concentration higher than that of the substrate. The punchthrough problem can thus be suppressed.
But these methods still have some drawbacks. In the high concentration region and the source/drain region, the P-N junction breakdown voltage is too low. In the device formed by the SPI technology, the source/drain junction capacitance is too high. These drawbacks will seriously affect the device speed.
From the above it is seen that a method of manufacturing a short channel field effect transistor with a higher punchthrough voltage and a lower junction capacitance is often desired.